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? semiconductor components industries, llc, 2009 january, 2009 ? rev. 2 1 publication order number: nlas5213/d nlas5213 1 r on dpst and dual spst switches the nlas5213a and nlas5213b are dpst and dual spst devices, respectively. they each consist of 2 single throw switches and are both designed for audio applications within portable devices. the nlas5213a is controlled with a single enable pin while the nlas5213b has two independent enables. both the nlas5213a and nlas5213b operate over a wide v cc range, 1.65 v to 4.5 v, and maintain a very low r on : 1.3 max @ v cc = 4.2 v. each is available in a choice of two packages: us8 and udfn8. features ? pst and dual spst pinouts ? r on : 1.3 max @ v cc = 4.2 v ? v cc range: 1.65 v to 4.5 v ? 8 kv human body model esd on i/o to gnd ? udfn8 or us8 packages available ? these are pb ? free devices typical applications ? mobile phones ? portable devices see detailed ordering, marking and shipping information in the package dimensions section on page 9 of this data sheet. ordering information marking diagram us8 us suffix case 493 8 1 1 8 xxm xx = device code m = date code = pb ? free package http://onsemi.com udfn8 mu suffix case 517aj xxm 1 8 application diagram nlas5213 codec (note: microdot may be in either location)
nlas5213 http://onsemi.com 2 figure 1. functional block diagram pinouts (udfn8) nlas5213a nlas5213b nlas5213a figure 2. functional block diagram pinouts (us8) 1 2 3 4 no1 in n.c. no 2 8 7 6 5 com1 gnd vcc com2 nlas5213b 1 2 3 4 no1 in1 in2 no 2 8 7 6 5 com1 gnd vcc com2 com1 gnd vcc com2 no1 in n.c. no2 1 2 3 4 8 7 6 5 com1 gnd vcc com2 no1 in1 in2 no2 1 2 3 4 8 7 6 5
nlas5213 http://onsemi.com 3 nlas5213a pin # name direction description udfn8 us8 1 8 no1 i/o normally open signal line of switch 1 2 7 in input control input 3 6 n.c. n/a no connect 4 5 no2 i/o normally open signal line of switch 2 5 4 com2 i/o common signal line of switch 2 6 3 v cc input analog supply voltage 7 2 gnd input ground 8 1 com1 i/o common signal line of switch 1 nlas5213b pin # name direction description udfn8 us8 1 8 no1 i/o normally open signal line of switch 1 2 7 in1 input control input of switch 1 3 6 in2 input control input of switch 2 4 5 no2 i/o normally open signal line of switch 2 5 4 com2 i/o common signal line of switch 2 6 3 v cc input analog supply voltage 7 2 gnd input ground 8 1 com1 i/o common signal line of switch 1 nlas5213a function table in no1, no2 0 1 off on nlas5213b function table in no1, no2 0 1 off on
nlas5213 http://onsemi.com 4 operating conditions maximum ratings symbol pins parameter value condition unit v cc v cc positive dc supply voltage ? 0.5 to 5.5 v v is nox, ncx, comx analog signal voltage ? 0.5 to v cc + 0.5 v v in in1, in2 control input voltage ? 0.5 to 5.5 v i cc v cc positive dc supply current 50 ma i is_con nox, ncx, comx analog signal continues current 300 closed switch ma i is_pk nox, ncx, comx analog signal peak current 500 10% duty cycle ma i in in control input current 20 ma t stg storage temperature range ? 65 to 150 oc stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. recommended operating conditions* symbol pins parameter value condition unit v cc v cc positive dc supply voltage 1.65 to 4.5 v v is nox, ncx, comx analog signal voltage 0 to v cc v v in in1, in2 control input voltage 0 to v cc v t a operating temperature range ? 40 to 85 oc minimum and maximum values are guaranteed through test or design across the recommended operating conditions , where applicable. typical values are listed for guidance only and are based on the particularconditions listed for each section, where applicable. these conditions are valid for all values found in the characteristics tables unless otherwise specified in the test conditions. esd protection symbol parameter value unit esd human body model i/o to gnd all pins 8.0 4.0 kv dc electrical characteristics control input (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max v ih oe control input high voltage 2.7 3.3 4.2 1.4 1.7 2.3 ? ? v v il oe control input low voltage 2.7 3.3 4.2 ? ? 0.5 0.5 0.8 v i in oe control input leakage current 0 v is v cc 1.65 ? 4.5 ? ? 1.0 a
nlas5213 http://onsemi.com 5 supply current and leakage (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max i cc v cc quiescent supply current v is = v cc or gnd; i d = 0 a 1.65 ? 4.5 ? ? 1.0 a i cct v cc increase in i cc per control voltage v in = 2.6 v 3.6 ? ? 10.0 a i oz off state leakage 0 v is v cc 1.65 ? 4.5 ? ? 1.0 a i off d+, d ? power off leakage current 0 v is v cc 0 ? ? 1.0 a on resistance (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max r on on ? resistance i on = ? 100 ma v is = 0 to v cc 2.7 3.3 4.2 ? 2.0 1.4 1.3 r flat on ? resistance flatness i on = ? 100 ma v is = 0 to v cc 2.7 3.3 4.2 ? 0.32 0.35 0.37 ? r on on ? resistance matching i on = ? 100 ma v is = 0 to v cc 2.7 3.3 4.2 ? 0.16 0.16 0.15 ? ac electrical characteristics timing/frequency (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf, f = 1 mhz) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max t on closed to open turn ? on time 1.65 ? 4.5 ? 20 ? ns t off open to closed turn ? off time 1.65 ? 4.5 ? 15 ? ns bw ? 3 db bandwidth c l = 5 pf 1.65 ? 4.5 ? 496 ? mhz isolation (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf, f = 1 mhz) symbol pins parameter test conditions v cc (v) ? 40 c to +85 c unit min typ max o irr open off ? isolation 1.65 ? 4.5 ? ? 57 ? db x talk hsd+, hsd ? non ? adjacent channel crosstalk 1.65 ? 4.5 ? ? 97 ? db capacitance (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf, f = 1 mhz) symbol pins parameter test conditions ? 40 c to +85 c unit min typ max c in oe control pin input capacitance v cc = 0 v ? 8.5 ? pf c on hsd+, to d+ on capacitance v in = 0 v ? 32 ? pf c off hsd+, hsd ? off capacitance v is = 3.3 v; v in = 3.3 v ? 19 ? pf
nlas5213 http://onsemi.com 6 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 0.4 0.8 1.2 1.6 2 2.4 v in (v) r ds(on) ( ) figure 3. r on @ v cc = 2.7 v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 r ds(on) ( ) v in (v) figure 4. r on @ v cc = 3.3 v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 4 r ds(on) ( ) v in (v) figure 5. r on @ v cc = 4.2 v 85 c 25 c ? 40 c 85 c 25 c ? 40 c 85 c 25 c ? 40 c
nlas5213 http://onsemi.com 7 figure 6. i cc vs. v in 0 20 40 60 80 100 120 160 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 v cc = 4.3 v v cc = 3.3 v v cc = 2.7 v v in , (v) i cc , ( a) 140 figure 7. t bbm (time break ? before ? make) output dut 50 35 pf v cc switch select pin output input v cc gnd figure 8. t on /t off 50% 50% 90% 90% t on t off v oh output input v cc 0 v figure 9. t on /t off dut open 35 pf v cc input 50% 50% 10% t on t off output input v cc 0 v 10% 50 0.1 f t bmm output v out v ol v out v oh v ol dut open v cc input output 50 35 pf v out 0.1 f 50 % of droop voltage droop
nlas5213 http://onsemi.com 8 channel switch control/s test socket is normalized. off isolation is measured across an off channel. on loss is the bandwidth of an on switch. v iso , bandwidth and v onl are independent of the input signal direction. v iso = off channel isolation = 20 log for v in at 100 khz v onl = on channel loss = 20 log for v in at 100 khz to 50 mhz bandwidth (bw) = the frequency 3 db below v onl v ct = use v iso setup and test to all other switch analog input/outputs terminated with 50 output dut input 50 50 generator reference transmitted figure 10. off channel isolation/on channel loss (bw)/crosstalk (on channel to off channel)/v onl 50 v out v in v out v in
nlas5213 http://onsemi.com 9 device ordering information device marking package type shipping ? nlas5213ausg vd us8 (pb ? free) 3,000 / tape & reel nlas5213amutag vd udfn8 (pb ? free) 3,000 / tape & reel NLAS5213BUSG ve us8 (pb ? free) 3,000 / tape & reel nlas5213bmutag ve udfn8 (pb ? free) 3,000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
nlas5213 http://onsemi.com 10 package dimensions us8 case 493 ? 02 issue b dim a min max min max inches 1.90 2.10 0.075 0.083 millimeters b 2.20 2.40 0.087 0.094 c 0.60 0.90 0.024 0.035 d 0.17 0.25 0.007 0.010 f 0.20 0.35 0.008 0.014 g 0.50 bsc 0.020 bsc h 0.40 ref 0.016 ref j 0.10 0.18 0.004 0.007 k 0.00 0.10 0.000 0.004 l 3.00 3.20 0.118 0.126 m 0 6 0 6 n 5 10 5 10 p 0.23 0.34 0.010 0.013 r 0.23 0.33 0.009 0.013 s 0.37 0.47 0.015 0.019 u 0.60 0.80 0.024 0.031 v 0.12 bsc 0.005 bsc notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters. 3. dimension ?a? does not include mold flash, protrusion or gate burr. mold flash. protrusion and gate burr shall not exceed 0.140 mm (0.0055?) per side. 4. dimension ?b? does not include inter ? lead flash or protrusion. inter ? lead flash and protrusion shall not e3xceed 0.140 (0.0055?) per side. 5. lead finish is solder plating with thickness of 0.0076 ? 0.0203 mm. (300 ? 800 ?). 6. all tolerance unless otherwise specified 0.0508 (0.0002 ?). l b a p g 4 1 5 8 c k d seating j s r u detail e v f h n r 0.10 typ m ? y ? ? x ? ? t ? detail e t m 0.10 (0.004) xy t 0.10 (0.004) plane *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* mm inches scale 8:1 3.8 0.15 0.50 0.0197 1.0 0.0394 0.30 0.012 1.8 0.07
nlas5213 http://onsemi.com 11 package dimensions udfn8 1.8x1.2, 0.4p case 517aj ? 01 issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal tip. 4. mold flash allowed on terminals along edge of package. flash may not exceed 0.03 onto bottom surface of terminals. 5. detail a shows optional construction for terminals. a b e d bottom view b e 8x b a c c note 3 0.10 c pin one reference top view 0.10 c a a1 (a3) 0.05 c 0.05 c c seating plane side view l 8x 1 4 5 8 dim min max millimeters a 0.45 0.55 a1 0.00 0.05 a3 0.127 ref b 0.15 0.25 d 1.80 bsc e 1.20 bsc e 0.40 bsc l 0.45 0.55 e/2 b2 0.30 ref l1 0.00 0.03 l2 0.40 ref detail a (l2) (b2) note 5 l1 detail a m 0.10 m 0.05 0.22 0.32 8x 1.50 0.40 pitch 0.66 dimensions: millimeters 7x 1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. nlas5213/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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